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authorDamjan Marion <damjan.marion@gmail.com>2020-02-13 18:14:06 +0100
committerDamjan Marion <damjan.marion@gmail.com>2020-02-13 18:17:54 +0100
commitf75defa7676759fa81ae75e7edd492572c6b8fd6 (patch)
treeda5eecdcdec868d14d81db8c59e2d1271899d49b /src/vppinfra/vector_neon.h
parentadcfb15fa0b08403c5b5b170149f7d3662e65761 (diff)
vppinfra: add 128-bit and 512-bit a ^ b ^ c shortcut
This allows us to combine 2 XOR operations into signle instruction which makes difference in crypto op: - in x86, by using ternary logic instruction - on ARM, by using EOR3 instruction (available with sha3 feature) Type: refactor Change-Id: Ibdf9001840399d2f838d491ca81b57cbd8430433 Signed-off-by: Damjan Marion <damjan.marion@gmail.com>
Diffstat (limited to 'src/vppinfra/vector_neon.h')
-rw-r--r--src/vppinfra/vector_neon.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/vppinfra/vector_neon.h b/src/vppinfra/vector_neon.h
index 81d99a64f05..3855f55ad41 100644
--- a/src/vppinfra/vector_neon.h
+++ b/src/vppinfra/vector_neon.h
@@ -203,6 +203,17 @@ u8x16_reflect (u8x16 v)
return (u8x16) vqtbl1q_u8 (v, mask);
}
+static_always_inline u8x16
+u8x16_xor3 (u8x16 a, u8x16 b, u8x16 c)
+{
+#if __GNUC__ == 8 && __ARM_FEATURE_SHA3 == 1
+ u8x16 r;
+__asm__ ("eor3 %0.16b,%1.16b,%2.16b,%3.16b": "=w" (r): "0" (a), "w" (b), "w" (c):);
+ return r;
+#endif
+ return a ^ b ^ c;
+}
+
#define CLIB_HAVE_VEC128_MSB_MASK
#define CLIB_HAVE_VEC128_UNALIGNED_LOAD_STORE