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authorSirshak Das <sirshak.das@arm.com>2018-05-29 21:21:02 -0500
committerDamjan Marion <dmarion.lists@gmail.com>2018-05-30 11:36:05 +0000
commit40c6e1d8e091fe8ac81f3907c035a121a6129019 (patch)
tree59e8cc0c39d09bef9d7bb881909d15b80a92b279 /src/vppinfra
parentff4ba35f181fedf530b64eb762576dd12f949658 (diff)
Fix clang compilation on aarch64: value size does not match register size.
Fixes clang error: value size does not match register size specified by the constraint and modifier Change-Id: I83e69445eacd6570607334e086a8582addb5bdfc Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Brian Brooks <brian.brooks@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Diffstat (limited to 'src/vppinfra')
-rw-r--r--src/vppinfra/time.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vppinfra/time.c b/src/vppinfra/time.c
index 1626ff4ed38..e9a764bcd31 100644
--- a/src/vppinfra/time.c
+++ b/src/vppinfra/time.c
@@ -147,7 +147,7 @@ os_cpu_clock_frequency (void)
* to each core which has registers for reading the current counter value
* as well as the clock frequency. The system counter is not clocked at
* the same frequency as the core. */
- u32 hz;
+ u64 hz;
asm volatile ("mrs %0, cntfrq_el0":"=r" (hz));
return (f64) hz;
#endif