aboutsummaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorDamjan Marion <damarion@cisco.com>2018-09-02 11:16:00 +0200
committerDamjan Marion <damarion@cisco.com>2018-09-02 11:24:12 +0200
commitedc4387602eb935c6e1702a713f0a5665c12d467 (patch)
tree6890cba4b9a494c56cc16db44d046e7ae2fb4d2d /src
parentcc4eb994e4a8a8c4a32beb64a9928c657e9cf60e (diff)
cmake: cache line size detection
Change-Id: I9a0df8d15deefdf31cfead56c96433cd7220b802 Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src')
-rw-r--r--src/cmake/cpu.cmake35
-rw-r--r--src/vppinfra/CMakeLists.txt2
2 files changed, 36 insertions, 1 deletions
diff --git a/src/cmake/cpu.cmake b/src/cmake/cpu.cmake
index 0e1171de3ea..1439be1db29 100644
--- a/src/cmake/cpu.cmake
+++ b/src/cmake/cpu.cmake
@@ -12,6 +12,41 @@
# limitations under the License.
##############################################################################
+# Cache line size detection
+##############################################################################
+if(CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64.*|AARCH64.*)")
+ file(READ "/proc/cpuinfo" cpuinfo)
+ string(REPLACE "\n" ";" cpuinfo ${cpuinfo})
+ foreach(l ${cpuinfo})
+ string(REPLACE ":" ";" l ${l})
+ list(GET l 0 name)
+ list(GET l 1 value)
+ string(STRIP ${name} name)
+ string(STRIP ${value} value)
+ if(${name} STREQUAL "CPU implementer")
+ set(CPU_IMPLEMENTER ${value})
+ endif()
+ if(${name} STREQUAL "CPU part")
+ set(CPU_PART ${value})
+ endif()
+ endforeach()
+ # Implementer 0x0a1 - Cavium
+ # Part 0x0a1 - ThunderX
+ if (${CPU_IMPLEMENTER} STREQUAL "0x43" AND ${CPU_PART} STREQUAL "0x0a1")
+ set(VPP_LOG2_CACHE_LINE_SIZE 7)
+ else()
+ set(VPP_LOG2_CACHE_LINE_SIZE 6)
+ endif()
+ math(EXPR VPP_CACHE_LINE_SIZE "1 << ${VPP_LOG2_CACHE_LINE_SIZE}")
+ message(STATUS "ARM AArch64 CPU implementer ${CPU_IMPLEMENTER} part ${CPU_PART} cacheline size ${VPP_CACHE_LINE_SIZE}")
+else()
+ set(VPP_LOG2_CACHE_LINE_SIZE 6)
+endif()
+
+set(VPP_LOG2_CACHE_LINE_SIZE ${VPP_LOG2_CACHE_LINE_SIZE}
+ CACHE STRING "Target CPU cache line size (power of 2)")
+
+##############################################################################
# CPU optimizations and multiarch support
##############################################################################
if(CMAKE_SYSTEM_PROCESSOR MATCHES "amd64.*|x86_64.*|AMD64.*")
diff --git a/src/vppinfra/CMakeLists.txt b/src/vppinfra/CMakeLists.txt
index 1b2797a85fc..d5242e88066 100644
--- a/src/vppinfra/CMakeLists.txt
+++ b/src/vppinfra/CMakeLists.txt
@@ -16,7 +16,7 @@ enable_language(ASM)
##############################################################################
# Generate vppinfra/config.h
##############################################################################
-set(LOG2_CACHE_LINE_BYTES 6)
+set(LOG2_CACHE_LINE_BYTES ${VPP_LOG2_CACHE_LINE_SIZE})
option(VPP_USE_DLMALLOC "Use dlmalloc memory allocator." ON)
if(VPP_USE_DLMALLOC)
set(DLMALLOC 1)