aboutsummaryrefslogtreecommitdiffstats
path: root/src/plugins/perfmon/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/plugins/perfmon/intel')
-rw-r--r--src/plugins/perfmon/intel/bundle/topdown_metrics.c115
-rw-r--r--src/plugins/perfmon/intel/core.c12
-rw-r--r--src/plugins/perfmon/intel/core.h4
3 files changed, 125 insertions, 6 deletions
diff --git a/src/plugins/perfmon/intel/bundle/topdown_metrics.c b/src/plugins/perfmon/intel/bundle/topdown_metrics.c
new file mode 100644
index 00000000000..386f3843bc3
--- /dev/null
+++ b/src/plugins/perfmon/intel/bundle/topdown_metrics.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2021 Intel and/or its affiliates.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <vnet/vnet.h>
+#include <perfmon/perfmon.h>
+#include <perfmon/intel/core.h>
+
+#define GET_METRIC(m, i) (((m) >> (i * 8)) & 0xff)
+#define GET_RATIO(m, i) (((m) >> (i * 32)) & 0xffffffff)
+#define RDPMC_FIXED_SLOTS (1 << 30) /* fixed slots */
+#define RDPMC_L1_METRICS (1 << 29) /* l1 metric counters */
+
+#define FIXED_COUNTER_SLOTS 3
+#define METRIC_COUNTER_TOPDOWN_L1 0
+
+typedef enum
+{
+ TOPDOWN_E_METRIC_RETIRING = 0,
+ TOPDOWN_E_METRIC_BAD_SPEC,
+ TOPDOWN_E_METRIC_FE_BOUND,
+ TOPDOWN_E_METRIC_BE_BOUND,
+} topdown_lvl1_counters_t;
+
+enum
+{
+ TOPDOWN_SLOTS = 0,
+ TOPDOWN_METRICS,
+} topdown_lvl1_metrics_t;
+
+static_always_inline f32
+topdown_lvl1_parse_row (perfmon_node_stats_t *ns, topdown_lvl1_counters_t e)
+{
+ f64 slots_t0 =
+ ns->t[0].value[TOPDOWN_SLOTS] *
+ ((f64) GET_METRIC (ns->t[0].value[TOPDOWN_METRICS], e) / 0xff);
+ f64 slots_t1 =
+ ns->t[1].value[TOPDOWN_SLOTS] *
+ ((f64) GET_METRIC (ns->t[1].value[TOPDOWN_METRICS], e) / 0xff);
+ u64 slots_delta =
+ ns->t[1].value[TOPDOWN_SLOTS] - ns->t[0].value[TOPDOWN_SLOTS];
+
+ slots_t1 = slots_t1 - slots_t0;
+
+ return (slots_t1 / slots_delta) * 100;
+}
+
+static u8 *
+format_topdown_lvl1 (u8 *s, va_list *args)
+{
+ perfmon_node_stats_t *st = va_arg (*args, perfmon_node_stats_t *);
+ u64 row = va_arg (*args, int);
+
+ switch (row)
+ {
+ case 0:
+ s = format (s, "%f",
+ topdown_lvl1_parse_row (st, TOPDOWN_E_METRIC_BAD_SPEC) +
+ topdown_lvl1_parse_row (st, TOPDOWN_E_METRIC_RETIRING));
+ break;
+ case 1:
+ s = format (s, "%f",
+ topdown_lvl1_parse_row (st, TOPDOWN_E_METRIC_BE_BOUND) +
+ topdown_lvl1_parse_row (st, TOPDOWN_E_METRIC_FE_BOUND));
+ break;
+ case 2:
+ s = format (s, "%f",
+ topdown_lvl1_parse_row (st, TOPDOWN_E_METRIC_RETIRING));
+ break;
+ case 3:
+ s = format (s, "%f",
+ topdown_lvl1_parse_row (st, TOPDOWN_E_METRIC_BAD_SPEC));
+ break;
+ case 4:
+ s = format (s, "%f",
+ topdown_lvl1_parse_row (st, TOPDOWN_E_METRIC_FE_BOUND));
+ break;
+ case 5:
+ s = format (s, "%f",
+ topdown_lvl1_parse_row (st, TOPDOWN_E_METRIC_BE_BOUND));
+ break;
+ }
+ return s;
+}
+
+PERFMON_REGISTER_BUNDLE (topdown_lvl1) = {
+ .name = "topdown-level1",
+ .description = "Top-down Microarchitecture Analysis Level 1",
+ .source = "intel-core",
+ .type = PERFMON_BUNDLE_TYPE_NODE,
+ .offset_type = PERFMON_OFFSET_TYPE_METRICS,
+ .events[0] = INTEL_CORE_E_TOPDOWN_SLOTS,
+ .events[1] = INTEL_CORE_E_TOPDOWN_L1_METRICS,
+ .metrics[0] = RDPMC_FIXED_SLOTS | FIXED_COUNTER_SLOTS,
+ .metrics[1] = RDPMC_L1_METRICS | METRIC_COUNTER_TOPDOWN_L1,
+ .n_events = 2,
+ .cpu_supports = clib_cpu_supports_avx512_bitalg,
+ .format_fn = format_topdown_lvl1,
+ .column_headers = PERFMON_STRINGS ("% NS", "% ST", "% NS.RT", "% NS.BS",
+ "% ST.FE", "% ST.BE"),
+ .footer = "Not Stalled (NS),STalled (ST),\n"
+ " Retiring (RT), Bad Speculation (BS),\n"
+ " FrontEnd bound (FE), BackEnd bound (BE)",
+};
diff --git a/src/plugins/perfmon/intel/core.c b/src/plugins/perfmon/intel/core.c
index b4267e8170c..cef6f32d7e6 100644
--- a/src/plugins/perfmon/intel/core.c
+++ b/src/plugins/perfmon/intel/core.c
@@ -20,12 +20,12 @@
static perfmon_event_t events[] = {
#define _(event, umask, edge, any, inv, cmask, n, suffix, desc) \
- [INTEL_CORE_E_##n##_##suffix] = { \
- .type = PERF_TYPE_RAW, \
- .config = PERF_INTEL_CODE (event, umask, edge, any, inv, cmask), \
- .name = #n "." #suffix, \
- .description = desc, \
- },
+ [INTEL_CORE_E_##n##_##suffix] = { .type = PERF_TYPE_RAW, \
+ .config = PERF_INTEL_CODE ( \
+ event, umask, edge, any, inv, cmask), \
+ .name = #n "." #suffix, \
+ .description = desc, \
+ .exclude_kernel = 1 },
foreach_perf_intel_core_event
#undef _
diff --git a/src/plugins/perfmon/intel/core.h b/src/plugins/perfmon/intel/core.h
index 01945d2c023..cd5c31ba260 100644
--- a/src/plugins/perfmon/intel/core.h
+++ b/src/plugins/perfmon/intel/core.h
@@ -27,6 +27,10 @@
"Core cycles when the thread is not in halt state") \
_ (0x00, 0x03, 0, 0, 0, 0x00, CPU_CLK_UNHALTED, REF_TSC, \
"Reference cycles when the core is not in halt state.") \
+ _ (0x00, 0x04, 0, 0, 0, 0x00, TOPDOWN, SLOTS, \
+ "TMA slots available for an unhalted logical processor.") \
+ _ (0x00, 0x80, 0, 0, 0, 0x00, TOPDOWN, L1_METRICS, \
+ "TMA slots metrics for an unhalted logical processor.") \
_ (0x03, 0x02, 0, 0, 0, 0x00, LD_BLOCKS, STORE_FORWARD, \
"Loads blocked due to overlapping with a preceding store that cannot be" \
" forwarded.") \