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Change-Id: I7b51f88292e057c6443b12224486f2d0c9f8ae23
Signed-off-by: Damjan Marion <damarion@cisco.com>
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- lb plugin: compatibility for non x86 platforms.
- Add vector_neon.h to support simd instructions, especially
'u16x8_zero_byte_mask' used in
"vnet/vnet/ip/ip4_source_and_port_range_check.c"
Change-Id: I395546b0e2d5748e73daffa51269a200ef8d1235
Signed-off-by: Christophe Fontaine <christophe.fontaine@qosmos.com>
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Change-Id: Iff88c9a0dd1b7401605075221640b269bec12859
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Fix additional a few additional deviations reported elsewhere by
checkstyle
Change-Id: I026a8ae1c5b1856bbe3c4a555e1b690e7501b045
Signed-off-by: Dave Barach <dave@barachs.net>
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* compiler -march= parameter is changed from native to corei7
so code is always genereted with instructions which are available
on the Nehalem microarchitecture (up to SSE4.2)
* compiler -mtune= parameter is added so code is optimized for
corei7-avx which equals to Sandy Bridge microarchitecture
* set of macros is added which allows run-time detection of available
cpu instructions (e.g. clib_cpu_supports_avx())
* set of macros is added which allows us to clone graph node funcitons
where cloned function is optmized for different microarchitecture
Those macros are using following attributes:
__attribute__((flatten))
__attribute__((target("arch=core-avx2)))
I.e. If applied to foo_node_fn() macro will generate cloned
functions foo_node_fn_avx2() and foo_node_fn_avx512() (future)
It will also generate function void * foo_node_fn_multiarch_select()
which detects available instruction set and returns pointer to the
best matching function clone.
Change-Id: I2dce0ac92a5ede95fcb56f47f3d1f3c4c040bac0
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Id7ea0410d6a789000c747c36a7e50076e31dc29a
Signed-off-by: Damjan Marion <damarion@cisco.com>
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